Low-density parity-check (LDPC) code was first proposed by Gallager in 1963. It is a linear block code including information bits and parity bits. For a LDPC code having a code length of n, a assuming a size (a length) of the information bits is k, a size of the parity bits is n−k. A ratio R=kin is called a code rate. An LDPC code encoding device processes a to-be-transmitted signal according to a generator matrix (also referred to as a G matrix) to generate a code word. Generally, some code elements of this code word include the to-be-transmitted signal and are also referred to as information bits, and some code elements include parity bits used for check. Subsequently, the LDPC code encoding device sends the code word to an LDPC code decoding device through a communications channel. Then, the LDPC code decoding device decodes the code word. In decoding the code word, the decoding devices, verifies whether the code word passes check decision. When an error occurs because the code word is interfered by noise in a process of transmission through the communications channel, the code word would fail to pass the check decision. The LDPC code decoding device needs to perform an iterative update on the code word by using a check matrix H, until an updated code word can pass the decision.
In a storage controller, generally a logic circuit, a chip or the like is used to implement an LDPC code decoding device. In specific implementations, data internally processed by the decoding device is quantized, calculated, and stored, and the quantization process may cause a decrease in an error correction capability of the LDPC code decoding device.